Quoting Nicolas Saenz Julienne (2020-07-30 11:26:19)
> Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
> feedback loop. Bypass it by zeroing fb_prediv_mask when running on
> bcm2711.
>
> Note that, since the prediv configuration bits were re-purposed, this
> was triggering miscalculations on all clocks hanging from the VPU clock,
> notably the aux UART, making its output unintelligible.
>
> Fixes: 42de9ad400af ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
> Reported-by: Nathan Chancellor <natechancel...@gmail.com>
> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulie...@suse.de>
> ---
Applied to clk-next
