XBurst CPUs present in Ingenic SoCs have virtually tagged caches,
according to the <cpu-features-override.h> header.
Add that information to cpu_probe_ingenic().
Signed-off-by: Paul Cercueil <p...@crapouillou.net>
---
Notes:
v2: No change
arch/mips/kernel/cpu-probe.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index a18f3611fa5e..a07e66a6e063 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -2125,6 +2125,9 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips
*c, unsigned int cpu)
c->options &= ~MIPS_CPU_COUNTER;
BUG_ON(!__builtin_constant_p(cpu_has_counter) || cpu_has_counter);
+ /* XBurst has virtually tagged icache */
+ c->icache.flags |= MIPS_CACHE_VTAG;
+
switch (c->processor_id & PRID_IMP_MASK) {
/* XBurst®1 with MXU1.0/MXU1.1 SIMD ISA */
--
2.28.0
