On Mon, Aug 10, 2020 at 05:05:36PM -0700, Jim Mattson wrote: > On Fri, Aug 7, 2020 at 1:47 AM Chenyi Qiang <chenyi.qi...@intel.com> wrote: > > > > PKS MSR passes through guest directly. Configure the MSR to match the > > L0/L1 settings so that nested VM runs PKS properly. > > > > Signed-off-by: Chenyi Qiang <chenyi.qi...@intel.com> > > --- > > arch/x86/kvm/vmx/nested.c | 32 ++++++++++++++++++++++++++++++++ > > arch/x86/kvm/vmx/vmcs12.c | 2 ++ > > arch/x86/kvm/vmx/vmcs12.h | 6 +++++- > > arch/x86/kvm/vmx/vmx.c | 10 ++++++++++ > > arch/x86/kvm/vmx/vmx.h | 1 + > > 5 files changed, 50 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c > > index df2c2e733549..1f9823d21ecd 100644 > > --- a/arch/x86/kvm/vmx/nested.c > > +++ b/arch/x86/kvm/vmx/nested.c > > @@ -647,6 +647,12 @@ static inline bool > > nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, > > MSR_IA32_PRED_CMD, > > MSR_TYPE_W); > > > > + if (!msr_write_intercepted_l01(vcpu, MSR_IA32_PKRS)) > > + nested_vmx_disable_intercept_for_msr( > > + msr_bitmap_l1, msr_bitmap_l0, > > + MSR_IA32_PKRS, > > + MSR_TYPE_R | MSR_TYPE_W); > > What if L1 intercepts only *reads* of MSR_IA32_PKRS?
nested_vmx_disable_intercept_for_msr() handles merging L1's desires, the (MSR_TYPE_R | MSR_TYPE_W) param is effectively L0's desire for L2.
