On Sat, Aug 15, 2020 at 8:20 PM Martin Blumenstingl
<martin.blumensti...@googlemail.com> wrote:
>
> The 3.10 vendor kernel defines the following GPU 20 interrupt lines:
> #define INT_MALI_GP AM_IRQ(160)
> #define INT_MALI_GP_MMU AM_IRQ(161)
> #define INT_MALI_PP AM_IRQ(162)
> #define INT_MALI_PMU AM_IRQ(163)
> #define INT_MALI_PP0 AM_IRQ(164)
> #define INT_MALI_PP0_MMU AM_IRQ(165)
> #define INT_MALI_PP1 AM_IRQ(166)
> #define INT_MALI_PP1_MMU AM_IRQ(167)
> #define INT_MALI_PP2 AM_IRQ(168)
> #define INT_MALI_PP2_MMU AM_IRQ(169)
> #define INT_MALI_PP3 AM_IRQ(170)
> #define INT_MALI_PP3_MMU AM_IRQ(171)
> #define INT_MALI_PP4 AM_IRQ(172)
> #define INT_MALI_PP4_MMU AM_IRQ(173)
> #define INT_MALI_PP5 AM_IRQ(174)
> #define INT_MALI_PP5_MMU AM_IRQ(175)
> #define INT_MALI_PP6 AM_IRQ(176)
> #define INT_MALI_PP6_MMU AM_IRQ(177)
> #define INT_MALI_PP7 AM_IRQ(178)
> #define INT_MALI_PP7_MMU AM_IRQ(179)
>
> However, the driver from the 3.10 vendor kernel does not use the
> following four interrupt lines:
> - INT_MALI_PP3
> - INT_MALI_PP3_MMU
> - INT_MALI_PP7
> - INT_MALI_PP7_MMU
>
> Drop the "pp3" and "ppmmu3" interrupt lines. This is also important
> because there is no matching entry in interrupt-names for it (meaning
> the "pp2" interrupt is actually assigned to the "pp3" interrupt line).
>
> Fixes: 7d3f6b536e72c9 ("ARM: dts: meson8: add the Mali-450 MP6 GPU")
> Reported-by: Thomas Graichen <thomas.graic...@gmail.com>
> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
Tested-by: thomas graichen <thomas.graic...@gmail.com>
sorry - looks like i missed this one
> ---
> re-send of v1 from [0] because it was never picked up
>
>
> [0] https://patchwork.kernel.org/patch/11582619/
>
>
> arch/arm/boot/dts/meson8.dtsi | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
> index 277c0bb10453..04688e8abce2 100644
> --- a/arch/arm/boot/dts/meson8.dtsi
> +++ b/arch/arm/boot/dts/meson8.dtsi
> @@ -240,8 +240,6 @@ mali: gpu@c0000 {
> <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>,
> --
> 2.28.0
>
