Even though the SP804 binding allows to specify only one clock, the
primecell driver requires a named clock to activate the bus clock.

Specify the one clock three times and provide some clock-names, to
make the DT match the SP804 and primecell binding.
Also add the missing arm,primecell compatible string.

Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
---
 arch/arm64/boot/dts/lg/lg1312.dtsi | 6 +++---
 arch/arm64/boot/dts/lg/lg1313.dtsi | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi 
b/arch/arm64/boot/dts/lg/lg1312.dtsi
index 64f3b135068d..e2a1564597c8 100644
--- a/arch/arm64/boot/dts/lg/lg1312.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1312.dtsi
@@ -131,11 +131,11 @@
                ranges;
 
                timers: timer@fd100000 {
-                       compatible = "arm,sp804";
+                       compatible = "arm,sp804", "arm,primecell";
                        reg = <0x0 0xfd100000 0x1000>;
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                };
                wdog: watchdog@fd200000 {
                        compatible = "arm,sp805", "arm,primecell";
diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi 
b/arch/arm64/boot/dts/lg/lg1313.dtsi
index ac23592ab011..a54d14d7ae6f 100644
--- a/arch/arm64/boot/dts/lg/lg1313.dtsi
+++ b/arch/arm64/boot/dts/lg/lg1313.dtsi
@@ -131,11 +131,11 @@
                ranges;
 
                timers: timer@fd100000 {
-                       compatible = "arm,sp804";
+                       compatible = "arm,sp804", "arm,primecell";
                        reg = <0x0 0xfd100000 0x1000>;
                        interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>, <&clk_bus>;
+                       clock-names = "timer0clk", "timer1clk", "apb_pclk";
                };
                wdog: watchdog@fd200000 {
                        compatible = "arm,sp805", "arm,primecell";
-- 
2.17.1

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