From: Arvind Sankar
> Sent: 02 September 2020 17:08
>
> On Wed, Sep 02, 2020 at 11:33:46AM -0400, Arvind Sankar wrote:
> > Fix this by:
> > - Using a memory clobber for the write functions to additionally prevent
> > caching/reordering memory accesses across CRn writes.
> > - Using a dummy input operand with an arbitrary constant address for the
> > read functions, instead of a global variable. This will prevent reads
> > from being reordered across writes, while allowing memory loads to be
> > cached/reordered across CRn reads, which should be safe.
> >
>
> Any thoughts on whether FORCE_ORDER is worth it just for CRn? MSRs don't
> use it, Nadav pointed out that PKRU doesn't use it (PKRU doesn't have a
> memory clobber on write either). I would guess that most of the volatile
> asm has not been written with the assumption that the compiler might
> decide to reorder it, so protecting just CRn access doesn't mitigate the
> impact of this bug.
I'm guessing that __force_order memory reference was added because
the compiler managed to reorder a particular pair of accesses.
However writing to some of the CR (and maybe MSR) has side effects
on other memory accesses - so should really have a full "memory" clobber.
OTOH none of the CR or MSR access are common, and I suspect a lot
are slow to execute (even if not actually serialising).
So a 'belt and braces' "memory" clobber that definitely stops the
compiler re-ordering instructions across the access avoids
any possible unwanted effects.
After all, any such code is really 'assembler written in C'.
David
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