Change H2+/H3 clocks to 8 steps from 528 MHz up to 1200 MHz to support a more fine-grained powersave setup. The SoCs are made for 1296 MHz, so these clocks are still in a safe range. Tested on a NanoPi Duo and OrangePi Zero.
Signed-off-by: Wilken Gottwalt <wilken.gottw...@mailbox.org> --- arch/arm/boot/dts/sun8i-h3.dtsi | 34 +++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 4e89701df91f..5517fcc02b7d 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -48,23 +48,53 @@ cpu0_opp_table: opp_table0 { compatible = "operating-points-v2"; opp-shared; - opp-648000000 { - opp-hz = /bits/ 64 <648000000>; + opp-528000000 { + opp-hz = /bits/ 64 <528000000>; + opp-microvolt = <1020000 1020000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-624000000 { + opp-hz = /bits/ 64 <624000000>; opp-microvolt = <1040000 1040000 1300000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1060000 1060000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp-816000000 { opp-hz = /bits/ 64 <816000000>; opp-microvolt = <1100000 1100000 1300000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1140000 1140000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + opp-1008000000 { opp-hz = /bits/ 64 <1008000000>; opp-microvolt = <1200000 1200000 1300000>; clock-latency-ns = <244144>; /* 8 32k periods */ }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <244144>; /* 8 32k periods */ + }; }; cpus { -- 2.28.0