Hi Marek,
On 2020-09-14 15:32, Marek Szyprowski wrote:
Hi Marc,
On 01.09.2020 16:43, Marc Zyngier wrote:
In order to switch the bcm2836 driver to privide standard interrupts
for IPIs, it first needs to stop lying about the way things work.
The mailbox interrupt is actually a multiplexer, with enough
bits to store 32 pending interrupts per CPU. So let's turn it
into a chained irqchip.
Once this is done, we can instanciate the corresponding IPIs,
and pass them to the architecture code.
Signed-off-by: Marc Zyngier <m...@kernel.org>
This one also fails. It breaks booting of Raspberry Pi 3b boards (both
in ARM and ARM64 mode):
Damn. This used to work. Looks like I was eager to delete stuff at
some point. Can you give this a go and let me know if that works
for you (only tested in QEMU with the raspi2 model):
diff --git a/drivers/irqchip/irq-bcm2836.c
b/drivers/irqchip/irq-bcm2836.c
index 85df6ddad9be..97838eb705f9 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -193,6 +193,8 @@ static void bcm2836_arm_irqchip_ipi_send_mask(struct
irq_data *d,
static struct irq_chip bcm2836_arm_irqchip_ipi = {
.name = "IPI",
+ .irq_mask = bcm2836_arm_irqchip_dummy_op,
+ .irq_unmask = bcm2836_arm_irqchip_dummy_op,
.irq_eoi = bcm2836_arm_irqchip_ipi_eoi,
.ipi_send_mask = bcm2836_arm_irqchip_ipi_send_mask,
};
Thanks again,
M.
--
Jazz is not dead. It just smells funny...
