On Mon, 07 Sep 2020 13:37:57 +0800, Zhiqiang Hou wrote:
> From: Hou Zhiqiang <zhiqiang....@nxp.com>
> 
> This property is to indicate the endianness when accessing the
> PEX_LUT and PF register block, so if these registers are
> implemented in big-endian, specify this property.
> 
> Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
> ---
>  Documentation/devicetree/bindings/pci/layerscape-pci.txt | 4 ++++
>  1 file changed, 4 insertions(+)
> 

Acked-by: Rob Herring <r...@kernel.org>

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