Add support for AMD's uncore L3 PMUs to count events by core/thread and/or by L3 slice.
The first patch rewrites most of the initial F17h support to enhance readability and to prepare for the new upcoming attributes. The second patch adds support for F17h's threadmask and slicemask. The third patch adds support for F19h's threadmask, coreid, sliceid, enallcores, and enallslices. F19h hardware can only count one core or slice, or all of them at one time. The last patch makes the driver's dmesg output more useful. Cc: Alexander Shishkin <[email protected]> Cc: Arnaldo Carvalho de Melo <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: "H. Peter Anvin" <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Michael Petlan <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Stephane Eranian <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Kim Phillips (4): perf/amd/uncore: Prepare to scale for more attributes that vary per family perf/amd/uncore: Allow F17h user threadmask and slicemask specification perf/amd/uncore: Allow F19h user coreid, threadmask, and sliceid specification perf/amd/uncore: Inform the user how many counters each uncore PMU has arch/x86/events/amd/uncore.c | 174 ++++++++++++++++++++++------------- 1 file changed, 111 insertions(+), 63 deletions(-) -- 2.27.0
