IOMMU UAPI data size is filled by the user space which must be validated
by the kernel. To ensure backward compatibility, user data can only be
extended by either re-purpose padding bytes or extend the variable sized
union at the end. No size change is allowed before the union. Therefore,
the minimum size is the offset of the union.

To use offsetof() on the union, we must make it named.

Link: https://lore.kernel.org/linux-iommu/20200611145518.0c281...@x1.home/
Signed-off-by: Jacob Pan <jacob.jun....@linux.intel.com>
Reviewed-by: Lu Baolu <baolu...@linux.intel.com>
Reviewed-by: Eric Auger <eric.au...@redhat.com>
---
 drivers/iommu/intel/iommu.c | 22 +++++++++++-----------
 drivers/iommu/intel/svm.c   |  2 +-
 include/uapi/linux/iommu.h  |  4 ++--
 3 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 87b17bac04c2..461f3a6864d4 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -5434,8 +5434,8 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, 
struct device *dev,
 
        /* Size is only valid in address selective invalidation */
        if (inv_info->granularity == IOMMU_INV_GRANU_ADDR)
-               size = to_vtd_size(inv_info->addr_info.granule_size,
-                                  inv_info->addr_info.nb_granules);
+               size = to_vtd_size(inv_info->granu.addr_info.granule_size,
+                                  inv_info->granu.addr_info.nb_granules);
 
        for_each_set_bit(cache_type,
                         (unsigned long *)&inv_info->cache,
@@ -5456,20 +5456,20 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, 
struct device *dev,
                 * granularity.
                 */
                if (inv_info->granularity == IOMMU_INV_GRANU_PASID &&
-                   (inv_info->pasid_info.flags & IOMMU_INV_PASID_FLAGS_PASID))
-                       pasid = inv_info->pasid_info.pasid;
+                   (inv_info->granu.pasid_info.flags & 
IOMMU_INV_PASID_FLAGS_PASID))
+                       pasid = inv_info->granu.pasid_info.pasid;
                else if (inv_info->granularity == IOMMU_INV_GRANU_ADDR &&
-                        (inv_info->addr_info.flags & 
IOMMU_INV_ADDR_FLAGS_PASID))
-                       pasid = inv_info->addr_info.pasid;
+                        (inv_info->granu.addr_info.flags & 
IOMMU_INV_ADDR_FLAGS_PASID))
+                       pasid = inv_info->granu.addr_info.pasid;
 
                switch (BIT(cache_type)) {
                case IOMMU_CACHE_INV_TYPE_IOTLB:
                        /* HW will ignore LSB bits based on address mask */
                        if (inv_info->granularity == IOMMU_INV_GRANU_ADDR &&
                            size &&
-                           (inv_info->addr_info.addr & ((BIT(VTD_PAGE_SHIFT + 
size)) - 1))) {
+                           (inv_info->granu.addr_info.addr & 
((BIT(VTD_PAGE_SHIFT + size)) - 1))) {
                                pr_err_ratelimited("User address not aligned, 
0x%llx, size order %llu\n",
-                                                  inv_info->addr_info.addr, 
size);
+                                                  
inv_info->granu.addr_info.addr, size);
                        }
 
                        /*
@@ -5477,9 +5477,9 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, 
struct device *dev,
                         * We use npages = -1 to indicate that.
                         */
                        qi_flush_piotlb(iommu, did, pasid,
-                                       mm_to_dma_pfn(inv_info->addr_info.addr),
+                                       
mm_to_dma_pfn(inv_info->granu.addr_info.addr),
                                        (granu == QI_GRAN_NONG_PASID) ? -1 : 1 
<< size,
-                                       inv_info->addr_info.flags & 
IOMMU_INV_ADDR_FLAGS_LEAF);
+                                       inv_info->granu.addr_info.flags & 
IOMMU_INV_ADDR_FLAGS_LEAF);
 
                        if (!info->ats_enabled)
                                break;
@@ -5502,7 +5502,7 @@ intel_iommu_sva_invalidate(struct iommu_domain *domain, 
struct device *dev,
                                size = 64 - VTD_PAGE_SHIFT;
                                addr = 0;
                        } else if (inv_info->granularity == 
IOMMU_INV_GRANU_ADDR) {
-                               addr = inv_info->addr_info.addr;
+                               addr = inv_info->granu.addr_info.addr;
                        }
 
                        if (info->ats_enabled)
diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
index 95c3164a2302..99353d6468fa 100644
--- a/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
@@ -370,7 +370,7 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, 
struct device *dev,
        spin_lock(&iommu->lock);
        ret = intel_pasid_setup_nested(iommu, dev,
                                       (pgd_t *)(uintptr_t)data->gpgd,
-                                      data->hpasid, &data->vtd, dmar_domain,
+                                      data->hpasid, &data->vendor.vtd, 
dmar_domain,
                                       data->addr_width);
        spin_unlock(&iommu->lock);
        if (ret) {
diff --git a/include/uapi/linux/iommu.h b/include/uapi/linux/iommu.h
index b42acc8fe007..5946779ac1f9 100644
--- a/include/uapi/linux/iommu.h
+++ b/include/uapi/linux/iommu.h
@@ -267,7 +267,7 @@ struct iommu_cache_invalidate_info {
        union {
                struct iommu_inv_pasid_info pasid_info;
                struct iommu_inv_addr_info addr_info;
-       };
+       } granu;
 };
 
 /**
@@ -333,7 +333,7 @@ struct iommu_gpasid_bind_data {
        /* Vendor specific data */
        union {
                struct iommu_gpasid_bind_data_vtd vtd;
-       };
+       } vendor;
 };
 
 #endif /* _UAPI_IOMMU_H */
-- 
2.7.4

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