On Mon, Sep 28, 2020 at 09:51:35AM -0500, Dan Murphy wrote:
> Set the speed optimization bit on the DP83869 PHY.
>
> Speed optimization, also known as link downshift, enables fallback to 100M
> operation after multiple consecutive failed attempts at Gigabit link
> establishment. Such a case could occur if cabling with only four wires
> (two twisted pairs) were connected instead of the standard cabling with
> eight wires (four twisted pairs).
>
> The number of failed link attempts before falling back to 100M operation is
> configurable. By default, four failed link attempts are required before
> falling back to 100M.
>
> Signed-off-by: Dan Murphy <dmur...@ti.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
> + default:
> + phydev_err(phydev,
> + "Downshift count must be 1, 2, 4 or 8\n");
> + return -EINVAL;
> + }
At some point it would be good to plumb in extack so we could return
this to user space.
Andrew
