On 9/16/20 3:44 PM, Pratyush Yadav wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the > content is safe > > Allow flashes to specify a hook to enable octal DTR mode. Use this hook > whenever possible to get optimal transfer speeds.
We need to restrict the access to octal dtr enable for flashes that enter in 8-8-8 dtr mode via non-volatile bits. It's what I tried in RFC 1/3. Looks good ;) > > Signed-off-by: Pratyush Yadav <p.ya...@ti.com> > --- > drivers/mtd/spi-nor/core.c | 35 +++++++++++++++++++++++++++++++++++ > drivers/mtd/spi-nor/core.h | 2 ++ > 2 files changed, 37 insertions(+) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index 87c568debf14..6ee93544d72f 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -3069,6 +3069,35 @@ static int spi_nor_init_params(struct spi_nor *nor) > return 0; > } > > +/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed > + * @nor: pointer to a 'struct spi_nor' > + * @enable: whether to enable or disable Octal DTR > + * > + * Return: 0 on success, -errno otherwise. > + */ > +static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable) > +{ > + int ret; > + > + if (!nor->params->octal_dtr_enable) > + return 0; > + > + if (!(nor->read_proto == SNOR_PROTO_8_8_8_DTR && > + nor->write_proto == SNOR_PROTO_8_8_8_DTR)) > + return 0; > + > + ret = nor->params->octal_dtr_enable(nor, enable); > + if (ret) > + return ret; > + > + if (enable) > + nor->reg_proto = SNOR_PROTO_8_8_8_DTR; > + else > + nor->reg_proto = SNOR_PROTO_1_1_1; > + > + return 0; > +} > + > /** > * spi_nor_quad_enable() - enable/disable Quad I/O if needed. > * @nor: pointer to a 'struct spi_nor' > @@ -3109,6 +3138,12 @@ static int spi_nor_init(struct spi_nor *nor) > { > int err; > > + err = spi_nor_octal_dtr_enable(nor, true); > + if (err) { > + dev_dbg(nor->dev, "octal mode not supported\n"); > + return err; > + } > + > err = spi_nor_quad_enable(nor, true); > if (err) { > dev_dbg(nor->dev, "quad mode not supported\n"); > diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h > index 42ec7692d8e7..fcb5f071ebed 100644 > --- a/drivers/mtd/spi-nor/core.h > +++ b/drivers/mtd/spi-nor/core.h > @@ -203,6 +203,7 @@ struct spi_nor_locking_ops { > * higher index in the array, the higher priority. > * @erase_map: the erase map parsed from the SFDP Sector Map > Parameter > * Table. > + * @octal_dtr_enable: enables SPI NOR octal DTR mode. > * @quad_enable: enables/disables SPI NOR Quad mode. > * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. > * @convert_addr: converts an absolute address into something the flash > @@ -226,6 +227,7 @@ struct spi_nor_flash_parameter { > > struct spi_nor_erase_map erase_map; > > + int (*octal_dtr_enable)(struct spi_nor *nor, bool enable); > int (*quad_enable)(struct spi_nor *nor, bool enable); > int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); > u32 (*convert_addr)(struct spi_nor *nor, u32 addr); > -- > 2.28.0 >