On Wed, Oct 07 2020 at 13:20, David Woodhouse wrote:
> From: David Woodhouse <d...@amazon.co.uk>
>
> This allows the host to indicate that IOAPIC and MSI emulation supports
> 15-bit destination IDs, allowing up to 32768 CPUs without interrupt
> remapping.
>
> cf. https://patchwork.kernel.org/patch/11816693/ for qemu
>
> Signed-off-by: David Woodhouse <d...@amazon.co.uk>
> Acked-by: Paolo Bonzini <pbonz...@redhat.com>
> ---
> Documentation/virt/kvm/cpuid.rst | 4 ++++
> arch/x86/include/uapi/asm/kvm_para.h | 1 +
> arch/x86/kernel/kvm.c | 6 ++++++
> 3 files changed, 11 insertions(+)
>
> diff --git a/Documentation/virt/kvm/cpuid.rst
> b/Documentation/virt/kvm/cpuid.rst
> index a7dff9186bed..1726b5925d2b 100644
> --- a/Documentation/virt/kvm/cpuid.rst
> +++ b/Documentation/virt/kvm/cpuid.rst
> @@ -92,6 +92,10 @@ KVM_FEATURE_ASYNC_PF_INT 14 guest checks
> this feature bit
> async pf acknowledgment msr
> 0x4b564d07.
>
> +KVM_FEATURE_MSI_EXT_DEST_ID 15 guest checks this feature bit
> + before using extended
> destination
> + ID bits in MSI address
> bits 11-5.
Why MSI_EXT_DEST_ID? It's enabling that for MSI and IO/APIC. The
underlying mechanism might be the same, but APIC_EXT_DEST_ID is more
general and then you might also make the explanation of that bit match
the changelog.
Thanks,
tglx
