[PATCH v3 6/6] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func

[Russ Weight]

Extend the MAX10 BMC Secure Update driver to include
a function that returns 64 bits of additional HW specific
data for errors that require additional information.
This callback function enables the hw_errinfo sysfs
node in the Intel Security Manager class driver.

Signed-off-by: Russ Weight <russell.h.wei...@intel.com>
---
v3:
  - Changed: iops -> sops, imgr -> smgr, IFPGA_ -> FPGA_, ifpga_ to fpga_
  - Changed "MAX10 BMC Secure Engine driver" to "MAX10 BMC Secure Update
    driver"
v2:
  - Implemented HW_ERRINFO_POISON for m10bmc_sec_hw_errinfo() to
    ensure that corresponding bits are set to 1 if we are unable
    to read the doorbell or auth_result registers.
  - Added m10bmc_ prefix to functions in m10bmc_iops structure
---
 drivers/fpga/intel-m10-bmc-secure.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/fpga/intel-m10-bmc-secure.c 
b/drivers/fpga/intel-m10-bmc-secure.c
index 3cf5708f8b0a..70eeccaed05e 100644
--- a/drivers/fpga/intel-m10-bmc-secure.c
+++ b/drivers/fpga/intel-m10-bmc-secure.c
@@ -503,6 +503,30 @@ static enum fpga_sec_err m10bmc_sec_cancel(struct 
fpga_sec_mgr *smgr)
        return ret ? FPGA_SEC_ERR_RW_ERROR : FPGA_SEC_ERR_NONE;
 }
 
+#define HW_ERRINFO_POISON      GENMASK(31, 0)
+static u64 m10bmc_sec_hw_errinfo(struct fpga_sec_mgr *smgr)
+{
+       struct m10bmc_sec *sec = smgr->priv;
+       u32 doorbell, auth_result;
+
+       switch (smgr->err_code) {
+       case FPGA_SEC_ERR_HW_ERROR:
+       case FPGA_SEC_ERR_TIMEOUT:
+       case FPGA_SEC_ERR_BUSY:
+       case FPGA_SEC_ERR_WEAROUT:
+               if (m10bmc_sys_read(sec->m10bmc, M10BMC_DOORBELL, &doorbell))
+                       doorbell = HW_ERRINFO_POISON;
+
+               if (m10bmc_sys_read(sec->m10bmc, M10BMC_AUTH_RESULT,
+                                   &auth_result))
+                       auth_result = HW_ERRINFO_POISON;
+
+               return (u64)doorbell << 32 | (u64)auth_result;
+       default:
+               return 0;
+       }
+}
+
 static const struct fpga_sec_mgr_ops m10bmc_sops = {
        .user_flash_count = m10bmc_user_flash_count,
        .bmc_root_entry_hash = m10bmc_bmc_reh,
@@ -521,6 +545,7 @@ static const struct fpga_sec_mgr_ops m10bmc_sops = {
        .write_blk = m10bmc_sec_write_blk,
        .poll_complete = m10bmc_sec_poll_complete,
        .cancel = m10bmc_sec_cancel,
+       .get_hw_errinfo = m10bmc_sec_hw_errinfo,
 };
 
 static int m10bmc_secure_probe(struct platform_device *pdev)
-- 
2.17.1