The following commit has been merged into the irq/core branch of tip: Commit-ID: 4e594ad1068ea1db359d6161f580f03edecf6cb0 Gitweb: https://git.kernel.org/tip/4e594ad1068ea1db359d6161f580f03edecf6cb0 Author: Alexandru Elisei <alexandru.eli...@arm.com> AuthorDate: Sat, 12 Sep 2020 16:37:06 +01:00 Committer: Marc Zyngier <m...@kernel.org> CommitterDate: Sun, 13 Sep 2020 17:51:35 +01:00
irqchip/gic-v3: Spell out when pseudo-NMIs are enabled When NMIs cannot be enabled, the driver prints a message stating that unambiguously. When they are enabled, the only feedback we get is a message regarding the use of synchronization for ICC_PMR_EL1 writes, which is not as useful for a user who is not intimately familiar with how NMIs are implemented. Let's make it obvious that pseudo-NMIs are enabled. Keep the message about using a barrier for ICC_PMR_EL1 writes, because it has a non-negligible impact on performance. Signed-off-by: Alexandru Elisei <alexandru.eli...@arm.com> Signed-off-by: Marc Zyngier <m...@kernel.org> Link: https://lore.kernel.org/r/20200912153707.667731-2-alexandru.eli...@arm.com --- drivers/irqchip/irq-gic-v3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 850842f..aa9b43d 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -1564,8 +1564,8 @@ static void gic_enable_nmi_support(void) if (gic_read_ctlr() & ICC_CTLR_EL1_PMHE_MASK) static_branch_enable(&gic_pmr_sync); - pr_info("%s ICC_PMR_EL1 synchronisation\n", - static_branch_unlikely(&gic_pmr_sync) ? "Forcing" : "Relaxing"); + pr_info("Pseudo-NMIs enabled using %s ICC_PMR_EL1 synchronisation\n", + static_branch_unlikely(&gic_pmr_sync) ? "forced" : "relaxed"); static_branch_enable(&supports_pseudo_nmis);
