[PATCH v3 2/5] arm64: tegra: Specify sdhci clock parent for Tegra194 SDMMC1 and SDMMC3

[Tamás Szűcs]

Use PLLC4_MUXED as clock source for SDMMC1 and SDMMC3 core clocks. This enables
more suitable interface clocks for higher data rate modes.

Signed-off-by: Tamás Szűcs <tsz...@protonmail.ch>
---
 arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi 
b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 058fdb1ffa1a..7e3ceeb5bc43 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -701,6 +701,9 @@
                        clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
                                 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
                        clock-names = "sdhci", "tmclk";
+                       assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
+                                         <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+                       assigned-clock-parents = <&bpmp 
TEGRA194_CLK_PLLC4_MUXED>;
                        resets = <&bpmp TEGRA194_RESET_SDMMC1>;
                        reset-names = "sdhci";
                        interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA 
&emc>,
@@ -739,6 +742,9 @@
                        clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
                                 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
                        clock-names = "sdhci", "tmclk";
+                       assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
+                                         <&bpmp TEGRA194_CLK_PLLC4_MUXED>;
+                       assigned-clock-parents = <&bpmp 
TEGRA194_CLK_PLLC4_MUXED>;
                        resets = <&bpmp TEGRA194_RESET_SDMMC3>;
                        reset-names = "sdhci";
                        interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR 
&emc>,
-- 
2.20.1