Hi Joakim, On Wed, 2020-10-14 at 16:57 +0800, Joakim Zhang wrote: > From: Liu Ying <victor....@nxp.com> > > Always export scu symbols for both SCU SoCs and non-SCU SoCs to avoid > build error.
s/scu/SCU/ > > Signed-off-by: Liu Ying <victor....@nxp.com> > Signed-off-by: Peng Fan <peng....@nxp.com> > Signed-off-by: Joakim Zhang <qiangqing.zh...@nxp.com> > --- > include/linux/firmware/imx/ipc.h | 15 +++++++++++++++ > include/linux/firmware/imx/svc/misc.h | 23 +++++++++++++++++++++++ > 2 files changed, 38 insertions(+) > > diff --git a/include/linux/firmware/imx/ipc.h > b/include/linux/firmware/imx/ipc.h > index 891057434858..300fa253fc30 100644 > --- a/include/linux/firmware/imx/ipc.h > +++ b/include/linux/firmware/imx/ipc.h > @@ -34,6 +34,7 @@ struct imx_sc_rpc_msg { > uint8_t func; > }; > > +#if IS_ENABLED(CONFIG_IMX_SCU) > /* > * This is an function to send an RPC message over an IPC channel. > * It is called by client-side SCFW API function shims. > @@ -55,4 +56,18 @@ int imx_scu_call_rpc(struct imx_sc_ipc *ipc, void > *msg, bool have_resp); > * @return Returns an error code (0 = success, failed if < 0) > */ > int imx_scu_get_handle(struct imx_sc_ipc **ipc); > + > +#else > +static inline int > +imx_scu_call_rpc(struct imx_sc_ipc *ipc, void *msg, bool have_resp) > +{ > + return -EIO; > +} > + > +static inline int imx_scu_get_handle(struct imx_sc_ipc **ipc) > +{ > + return -EIO; > +} > +#endif > + > #endif /* _SC_IPC_H */ > diff --git a/include/linux/firmware/imx/svc/misc.h > b/include/linux/firmware/imx/svc/misc.h > index 031dd4d3c766..d255048f17de 100644 > --- a/include/linux/firmware/imx/svc/misc.h > +++ b/include/linux/firmware/imx/svc/misc.h > @@ -46,6 +46,7 @@ enum imx_misc_func { > * Control Functions > */ > > +#if IS_ENABLED(CONFIG_IMX_SCU) > int imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, > u8 ctrl, u32 val); > > @@ -55,4 +56,26 @@ int imx_sc_misc_get_control(struct imx_sc_ipc > *ipc, u32 resource, > int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 resource, > bool enable, u64 phys_addr); > > +#else > +static inline int > +imx_sc_misc_set_control(struct imx_sc_ipc *ipc, u32 resource, > + u8 ctrl, u32 val) > +{ > + return -EIO; > +} > + > +static inline int > +imx_sc_misc_get_control(struct imx_sc_ipc *ipc, u32 resource, > + u8 ctrl, u32 *val) > +{ > + return -EIO; > +} > + > +static inline int imx_sc_pm_cpu_start(struct imx_sc_ipc *ipc, u32 > resource, > + bool enable, u64 phys_addr) > +{ > + return -EIO; > +} > +#endif > + > #endif /* _SC_MISC_API_H */ This is done in our downstream tree. I did this because a downstream display driver covers SoCs w/wo SCU. For upstream, I find the drivers can be splited so that this is not needed. Do you see any existing upstream driver covers SoCs w/wo SCU? I think this can be introduced together with the first that kink of driver. -- Liu Ying