On 10/19/2020 8:29 PM, Jordan Crouse wrote:
On Mon, Oct 19, 2020 at 06:49:18PM +0530, Akhil P Oommen wrote:
On targets with a6xx gpu, there is a duplicate gpu icc node listed in
the interconnect summary. On these targets, calling

This first sentence is confusing to me. I think the following few sentences do
a better job of explaining what you are trying to do.
I can just remove that line.

dev_pm_opp_of_add_table() api initializes the icc nodes for gpu indirectly.
So we should avoid using of_icc_get() api in the common probe path. To fix
this, we can move of_icc_get() to target specific code where it is
required.

Signed-off-by: Akhil P Oommen <akhi...@codeaurora.org>
---
  drivers/gpu/drm/msm/adreno/a3xx_gpu.c   | 21 +++++++++++++++++++--
  drivers/gpu/drm/msm/adreno/a4xx_gpu.c   | 20 ++++++++++++++++++--
  drivers/gpu/drm/msm/adreno/adreno_gpu.c | 29 +----------------------------
  3 files changed, 38 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c 
b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index f29c77d..93da668 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
@@ -519,6 +519,8 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct icc_path *ocmem_icc_path;
+       struct icc_path *icc_path;
        int ret;
if (!pdev) {
@@ -566,13 +568,28 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev)
                goto fail;
        }
+ icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
+       ret = IS_ERR(icc_path);
+       if (ret)
+               goto fail;
+
+       ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
+       ret = IS_ERR(ocmem_icc_path);
+       if (ret) {
+               /* allow -ENODATA, ocmem icc is optional */
+               if (ret != -ENODATA)
+                       goto fail;
+               ocmem_icc_path = NULL;
+       }
+
+
        /*
         * Set the ICC path to maximum speed for now by multiplying the fastest
         * frequency by the bus width (8). We'll want to scale this later on to
         * improve battery life.
         */
-       icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
-       icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);

This seems reasonable but I hope we can get somebody to sign off on a real a3xx
part.

return gpu; diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 2b93b33..c0be3a0 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
@@ -648,6 +648,8 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
        struct msm_gpu *gpu;
        struct msm_drm_private *priv = dev->dev_private;
        struct platform_device *pdev = priv->gpu_pdev;
+       struct icc_path *ocmem_icc_path;
+       struct icc_path *icc_path;
        int ret;
if (!pdev) {
@@ -694,13 +696,27 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev)
                goto fail;
        }
+ icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");
+       ret = IS_ERR(icc_path);
+       if (ret)
+               goto fail;
+
+       ocmem_icc_path = devm_of_icc_get(&pdev->dev, "ocmem");
+       ret = IS_ERR(ocmem_icc_path);
+       if (ret) {
+               /* allow -ENODATA, ocmem icc is optional */
+               if (ret != -ENODATA)
+                       goto fail;
+               ocmem_icc_path = NULL;
+       }
+
        /*
         * Set the ICC path to maximum speed for now by multiplying the fastest
         * frequency by the bus width (8). We'll want to scale this later on to
         * improve battery life.
         */
-       icc_set_bw(gpu->icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
-       icc_set_bw(gpu->ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);
+       icc_set_bw(ocmem_icc_path, 0, Bps_to_icc(gpu->fast_rate) * 8);

Less confident we can find any 4xx fans to test this, but if a3xx works then so
should this (in theory).

        return gpu;
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index fd8f491..6e3b820 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
@@ -920,35 +920,8 @@ int adreno_gpu_init(struct drm_device *drm, struct 
platform_device *pdev,
ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,
                        adreno_gpu->info->name, &adreno_gpu_config);
-       if (ret)
-               return ret;
-
-       /*
-        * The legacy case, before "interconnect-names", only has a
-        * single interconnect path which is equivalent to "gfx-mem"
-        */
-       if (!of_find_property(dev->of_node, "interconnect-names", NULL)) {
-               gpu->icc_path = of_icc_get(dev, NULL);
-       } else {
-               gpu->icc_path = of_icc_get(dev, "gfx-mem");
-               gpu->ocmem_icc_path = of_icc_get(dev, "ocmem");
-       }
- if (IS_ERR(gpu->icc_path)) {
-               ret = PTR_ERR(gpu->icc_path);
-               gpu->icc_path = NULL;
-               return ret;
-       }
-
-       if (IS_ERR(gpu->ocmem_icc_path)) {
-               ret = PTR_ERR(gpu->ocmem_icc_path);
-               gpu->ocmem_icc_path = NULL;
-               /* allow -ENODATA, ocmem icc is optional */
-               if (ret != -ENODATA)
-                       return ret;
-       }
-
-       return 0;
+       return ret;

This could go even further:

return msm_gpu_init(...);

Yep, we can do that. Thanks for the feedback.

--Akhil
  }
void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
--
2.7.4



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