According to the documentation from NXP, the i.MX8M Nano has a
Vivante GC7000 Ultra Lite as its GPU core.

With this patch, the Etnaviv driver presents the GPU as:
   etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203

It uses the GPCV2 controller to enable the power domain for the GPU.

Signed-off-by: Adam Ford <aford...@gmail.com>
---
This patch depends on a series located:
https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=368903
and

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi 
b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 605e6dbd2c6f..62c8cd3dea7c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -4,6 +4,8 @@
  */
 
 #include <dt-bindings/clock/imx8mn-clock.h>
+#include <dt-bindings/power/imx8mn-power.h>
+#include <dt-bindings/reset/imx8mq-reset.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -1019,6 +1021,31 @@ gpmi: nand-controller@33002000 {
                        status = "disabled";
                };
 
+               gpu: gpu@38000000 {
+                       compatible = "vivante,gc";
+                       reg = <0x38000000 0x8000>;
+                       interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk IMX8MN_CLK_GPU_AHB>,
+                               <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
+                               <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
+                               <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
+                       clock-names = "reg", "bus", "core", "shader";
+                       assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>,
+                                         <&clk IMX8MN_CLK_GPU_SHADER_SRC>,
+                                         <&clk IMX8MN_CLK_GPU_AXI>,
+                                         <&clk IMX8MN_CLK_GPU_AHB>,
+                                         <&clk IMX8MN_GPU_PLL>,
+                                         <&clk IMX8MN_CLK_GPU_CORE_DIV>,
+                                         <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
+                       assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
+                                                 <&clk IMX8MN_GPU_PLL_OUT>,
+                                                 <&clk IMX8MN_SYS_PLL1_800M>,
+                                                 <&clk IMX8MN_SYS_PLL1_800M>;
+                       assigned-clock-rates = <0>, <0>, <800000000>, 
<400000000>, <1200000000>,
+                               <400000000>, <400000000>;
+                       power-domains = <&pgc_gpumix>;
+               };
+
                gic: interrupt-controller@38800000 {
                        compatible = "arm,gic-v3";
                        reg = <0x38800000 0x10000>,
-- 
2.25.1

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