[PATCH v1 1/2] bus: mhi: core: Count number of HW channels supported by controller

[Hemant Kumar]

Device provides the total number of HW channels it supports using MHI
configuration register. Host supported HW channels shall not exceed
that value. In order to make this check, a counter is needed to store
total number of HW channels required by host.

Signed-off-by: Hemant Kumar <hema...@codeaurora.org>
---
 drivers/bus/mhi/core/init.c     | 2 ++
 drivers/bus/mhi/core/internal.h | 1 +
 include/linux/mhi.h             | 1 +
 3 files changed, 4 insertions(+)

diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c
index 0ffdebd..70fd6af 100644
--- a/drivers/bus/mhi/core/init.c
+++ b/drivers/bus/mhi/core/init.c
@@ -725,6 +725,8 @@ static int parse_ch_cfg(struct mhi_controller *mhi_cntrl,
                mhi_chan = &mhi_cntrl->mhi_chan[chan];
                mhi_chan->name = ch_cfg->name;
                mhi_chan->chan = chan;
+               if (chan >= MHI_HW_CHAN_START_IDX)
+                       mhi_cntrl->hw_chan++;
 
                mhi_chan->tre_ring.elements = ch_cfg->num_elements;
                if (!mhi_chan->tre_ring.elements)
diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
index 7989269..3d8e480 100644
--- a/drivers/bus/mhi/core/internal.h
+++ b/drivers/bus/mhi/core/internal.h
@@ -454,6 +454,7 @@ enum mhi_pm_state {
 #define PRIMARY_CMD_RING               0
 #define MHI_DEV_WAKE_DB                        127
 #define MHI_MAX_MTU                    0xffff
+#define MHI_HW_CHAN_START_IDX          100
 #define MHI_RANDOM_U32_NONZERO(bmsk)   (prandom_u32_max(bmsk) + 1)
 
 enum mhi_er_type {
diff --git a/include/linux/mhi.h b/include/linux/mhi.h
index d4841e5..ea441d2 100644
--- a/include/linux/mhi.h
+++ b/include/linux/mhi.h
@@ -389,6 +389,7 @@ struct mhi_controller {
        struct list_head lpm_chans;
        int *irq;
        u32 max_chan;
+       u32 hw_chan;
        u32 total_ev_rings;
        u32 hw_ev_rings;
        u32 sw_ev_rings;
-- 
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