[PATCH v5 19/21] perf arm-spe: Add more sub classes for operation packet

[Leo Yan]

For the operation type packet payload with load/store class, it misses
to support these sub classes:

  - A load/store targeting the general-purpose registers;
  - A load/store targeting unspecified registers;
  - The ARMv8.4 nested virtualisation extension can redirect system
    register accesses to a memory page controlled by the hypervisor.
    The SPE profiling feature in newer implementations can tag those
    memory accesses accordingly.

Add the bit pattern describing load/store sub classes, so that the perf
tool can decode it properly.

Inspired by Andre Przywara, refined the commit log and code for more
clear description.

Co-developed-by: Andre Przywara <andre.przyw...@arm.com>
Signed-off-by: Leo Yan <leo....@linaro.org>
Reviewed-by: Andre Przywara <andre.przyw...@arm.com>
---
 .../util/arm-spe-decoder/arm-spe-pkt-decoder.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 575635c54e48..70593a4e0aa5 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -326,9 +326,23 @@ static int arm_spe_pkt_desc_op_type(const struct 
arm_spe_pkt *packet,
                                arm_spe_pkt_snprintf(&err, &buf, &blen, " 
EXCL");
                        if (payload & SPE_OP_PKT_AR)
                                arm_spe_pkt_snprintf(&err, &buf, &blen, " AR");
-               } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
-                                       SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
+               }
+
+               switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) {
+               case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP:
                        arm_spe_pkt_snprintf(&err, &buf, &blen, " SIMD-FP");
+                       break;
+               case SPE_OP_PKT_LDST_SUBCLASS_GP_REG:
+                       arm_spe_pkt_snprintf(&err, &buf, &blen, " GP-REG");
+                       break;
+               case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG:
+                       arm_spe_pkt_snprintf(&err, &buf, &blen, " UNSPEC-REG");
+                       break;
+               case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG:
+                       arm_spe_pkt_snprintf(&err, &buf, &blen, " NV-SYSREG");
+                       break;
+               default:
+                       break;
                }
 
                return err ?: (int)(buf_len - blen);
-- 
2.17.1