> -----Original Message----- > From: Paolo Bonzini <[email protected]> > Sent: Tuesday, September 22, 2020 5:10 PM > To: Qi, Yadong <[email protected]>; [email protected]; linux- > [email protected]; [email protected] > Cc: Christopherson, Sean J <[email protected]>; > [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; Gao, > Chao <[email protected]>; Tian, Kevin <[email protected]>; Chen, Luhai > <[email protected]>; Zhu, Bing <[email protected]>; Wang, Kai Z > <[email protected]> > Subject: Re: [PATCH] KVM: x86: emulate wait-for-SIPI and SIPI-VMExit > > On 22/09/20 07:23, [email protected] wrote: > > From: Yadong Qi <[email protected]> > > > > Background: We have a lightweight HV, it needs INIT-VMExit and > > SIPI-VMExit to wake-up APs for guests since it do not monitor the > > Local APIC. But currently virtual wait-for-SIPI(WFS) state is not > > supported in nVMX, so when running on top of KVM, the L1 HV cannot > > receive the INIT-VMExit and SIPI-VMExit which cause the L2 guest > > cannot wake up the APs. > > > > According to Intel SDM Chapter 25.2 Other Causes of VM Exits, SIPIs > > cause VM exits when a logical processor is in wait-for-SIPI state. > > > > In this patch: > > 1. introduce SIPI exit reason, > > 2. introduce wait-for-SIPI state for nVMX, > > 3. advertise wait-for-SIPI support to guest. > > > > When L1 hypervisor is not monitoring Local APIC, L0 need to emulate > > INIT-VMExit and SIPI-VMExit to L1 to emulate INIT-SIPI-SIPI for L2. L2 > > LAPIC write would be traped by L0 Hypervisor(KVM), L0 should emulate > > the INIT/SIPI vmexit to L1 hypervisor to set proper state for L2's > > vcpu state. > > > > Handle procdure: > > Source vCPU: > > L2 write LAPIC.ICR(INIT). > > L0 trap LAPIC.ICR write(INIT): inject a latched INIT event to target > > vCPU. > > Target vCPU: > > L0 emulate an INIT VMExit to L1 if is guest mode. > > L1 set guest VMCS, guest_activity_state=WAIT_SIPI, vmresume. > > L0 set vcpu.mp_state to INIT_RECEIVED if (vmcs12.guest_activity_state > > == WAIT_SIPI). > > > > Source vCPU: > > L2 write LAPIC.ICR(SIPI). > > L0 trap LAPIC.ICR write(INIT): inject a latched SIPI event to traget > > vCPU. > > Target vCPU: > > L0 emulate an SIPI VMExit to L1 if (vcpu.mp_state == INIT_RECEIVED). > > L1 set CS:IP, guest_activity_state=ACTIVE, vmresume. > > L0 resume to L2. > > L2 start-up. > > Again, this looks good but it needs testcases. >
Hi, Paolo I saw you queued the testcase patch: https://patchwork.kernel.org/project/kvm/patch/[email protected]/ Will you also queue this patch? Or there are some additional comments of this patch? Best Regard Yadong
