Hi Ahmad On 10/20/20 4:04 PM, Ahmad Fatoum wrote:
From: Yann Gautier <yann.gaut...@st.com>Update the IP version to v2.0, which supports linked lists in internal DMA, and is present in STM32MP1 SoCs. The mmci driver supports the v2.0 periph id since 7a2a98be672b ("mmc: mmci: Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into the SoC device tree to benefit from the improved DMA support. Signed-off-by: Ludovic Barre <ludovic.ba...@st.com> Signed-off-by: Yann Gautier <yann.gaut...@st.com> [afa: cherry-picked from https://github.com/STMicroelectronics/linux/commit/31e2a6bc8] [afa: extended commit message with reference to driver patch] Signed-off-by: Ahmad Fatoum <a.fat...@pengutronix.de>
Applied on stm32-next. Thanks. Alex
--- Cc: Ludovic Barre <ludovic.ba...@st.com> --- arch/arm/boot/dts/stm32mp151.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index bfe29023fbd5..b8d996d32dc0 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1040,7 +1040,7 @@ adc2: adc@100 {sdmmc3: sdmmc@48004000 {compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x10153180>; + arm,primecell-periphid = <0x00253180>; reg = <0x48004000 0x400>; interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cmd_irq"; @@ -1338,7 +1338,7 @@ qspi: spi@58003000 {sdmmc1: sdmmc@58005000 {compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x10153180>; + arm,primecell-periphid = <0x00253180>; reg = <0x58005000 0x1000>; interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cmd_irq"; @@ -1353,7 +1353,7 @@ sdmmc1: sdmmc@58005000 {sdmmc2: sdmmc@58007000 {compatible = "arm,pl18x", "arm,primecell"; - arm,primecell-periphid = <0x10153180>; + arm,primecell-periphid = <0x00253180>; reg = <0x58007000 0x1000>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "cmd_irq";
