Add the smpctrl registers to the infinity2m dtsi so that the
second CPU can be enabled on chips in this family.

Signed-off-by: Daniel Palmer <dan...@0x0f.com>
---
 arch/arm/boot/dts/mstar-infinity2m.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi 
b/arch/arm/boot/dts/mstar-infinity2m.dtsi
index 02adb9fe9d3c..6d4d1d224e96 100644
--- a/arch/arm/boot/dts/mstar-infinity2m.dtsi
+++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi
@@ -13,3 +13,10 @@ cpu1: cpu@1 {
                reg = <0x1>;
        };
 };
+
+&riu {
+       smpctrl: smpctrl@204000 {
+               reg = <0x204000 0x200>;
+               status = "disabled";
+       };
+};
-- 
2.29.2

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