Hi,
Could you please review this patch in the context of the following patch?
http://patchwork.ozlabs.org/project/linux-pci/patch/20201124105035.24573-1-vid...@nvidia.com/
Thanks,
Vidya Sagar
On 11/17/2020 10:23 PM, Vidya Sagar wrote:
Set DMA mask to 32-bit while allocating the MSI target address so that
the address is usable for both 32-bit and 64-bit MSI capable devices.
Throw a warning if it fails to set the mask to 32-bit to alert that
devices that are only 32-bit MSI capable may not work properly.
Signed-off-by: Vidya Sagar <vid...@nvidia.com>
---
Given the other patch that I've pushed to the MSI sub-system
http://patchwork.ozlabs.org/project/linux-pci/patch/20201117145728.4516-1-vid...@nvidia.com/
which is going to catch any mismatch between MSI capability (32-bit) of the
device and system's inability to allocate the required MSI target address,
I'm not sure how much sense is this patch going to be make. But, I can
certainly say that if the memory allocation mechanism gives the addresses
from 64-bit pool by default, this patch at least makes sure that MSI target
address is allocated from 32-bit pool.
drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
b/drivers/pci/controller/dwc/pcie-designware-host.c
index 44c2a6572199..e6a230eddf66 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -388,6 +388,14 @@ int dw_pcie_host_init(struct pcie_port *pp)
dw_chained_msi_isr,
pp);
+ ret = dma_set_mask(pci->dev, DMA_BIT_MASK(32));
+ if (!ret) {
+ dev_warn(pci->dev,
+ "Failed to set DMA mask to 32-bit. "
+ "Devices with only 32-bit MSI support"
+ " may not work properly\n");
+ }
+
pp->msi_data = dma_map_single_attrs(pci->dev,
&pp->msi_msg,
sizeof(pp->msi_msg),
DMA_FROM_DEVICE,
