> On Dec 3, 2020, at 11:54 PM, Nicholas Piggin <npig...@gmail.com> wrote:
>
> Excerpts from Andy Lutomirski's message of December 4, 2020 3:26 pm:
>> This is a mockup. It's designed to illustrate the algorithm and how the
>> code might be structured. There are several things blatantly wrong with
>> it:
>>
>> The coding stype is not up to kernel standards. I have prototypes in the
>> wrong places and other hacks.
>>
>> There's a problem with mm_cpumask() not being reliable.
>
> Interesting, this might be a way to reduce those IPIs with fairly
> minimal fast path cost. Would be interesting to see how much performance
> advantage it has over my dumb simple shoot-lazies.
My real motivation isn’t really performance per se. I think there’s
considerable value in keeping the core algorithms the same across all
architectures, and I think my approach can manage that with only a single hint
from the architecture as to which CPUs to scan.
With shoot-lazies, in contrast, enabling it everywhere would either malfunction
or have very poor performance or even DoS issues on arches like arm64 and s390x
that don’t track mm_cpumask at all. I’m sure we could come up with some way to
mitigate that, but I think that my approach may be better overall for keeping
the core code uniform and relatively straightforward.
>
> For powerpc I don't think we'd be inclined to go that way, so don't feel
> the need to add this complexity for us alone -- we'd be more inclined to
> move the exit lazy to the final TLB shootdown path, which we're slowly
> getting more infrastructure in place to do.
>
>
> There's a few nits but I don't think I can see a fundamental problem
> yet.
Thanks!
I can polish the patch, but I want to be sure the memory ordering parts are
clear.
>
> Thanks,
> Nick
