The default clock source on i.MX8M Mini and Nano boards use a 24MHz clock, but users who need to re-parent the clock source run into issues because all the UART clocks are enabled whether or not they're needed by sdout.
Any attempt to change the parent results in an busy error because the clocks have been enabled already. clk: failed to reparent uart1 to sys_pll1_80m: -16 Instead of pre-initializing all UARTS, scan the device tree to see if UART clock is used as stdout before initializing it. Only enable the UART clock if it's needed in order to delay the clock initialization until after the re-parenting of the clocks. Fixes: 9461f7b33d11c ("clk: fix CLK_SET_RATE_GATE with clock rate protection") Suggested-by: Aisheng Dong <aisheng.d...@nxp.com> Signed-off-by: Adam Ford <aford...@gmail.com> diff --git a/drivers/clk/imx/clk.c b/drivers/clk/imx/clk.c index 47882c51cb85..6dcc5fbd8f3f 100644 --- a/drivers/clk/imx/clk.c +++ b/drivers/clk/imx/clk.c @@ -163,12 +163,18 @@ __setup_param("earlyprintk", imx_keep_uart_earlyprintk, void imx_register_uart_clocks(struct clk ** const clks[]) { + struct clk *uart_clk; if (imx_keep_uart_clocks) { int i; imx_uart_clocks = clks; - for (i = 0; imx_uart_clocks[i]; i++) - clk_prepare_enable(*imx_uart_clocks[i]); + for (i = 0; imx_uart_clocks[i]; i++) { + uart_clk = of_clk_get(of_stdout, i); + if (IS_ERR(uart_clk)) + continue; + clk_prepare_enable(uart_clk); + clk_put(uart_clk); + } } } -- 2.25.1