Adds documentation on how to use the sun8i_hwspinlock driver for sun8i compatible SoCs.
Signed-off-by: Wilken Gottwalt <wilken.gottw...@posteo.net> --- .../bindings/hwlock/sun8i-hwspinlock.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml new file mode 100644 index 000000000000..2954ee0b36a7 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/sun8i-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SUN8I hardware spinlock driver for Allwinner sun8i compatible SoCs + +maintainers: + - Wilken Gottwalt <wilken.gottw...@posteo.net> + +properties: + compatible: + enum: + - allwinner,sun8i-hwspinlock + + reg: # 0x01C18000 (H2+, H3, H5), 0x03004000 (H6), length 0x1000 + maxItems: 1 + + clocks: # phandle to the reference clock + maxItems: 1 + + clock-names: # name of the bus ("ahb") + maxItems: 1 + + resets: # phandle to the reset control + maxItems: 1 + + reset-names: # name of the bus ("ahb") + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + + - | + /* H2+ based OrangePi Zero */ + hwspinlock: hwspinlock@1C18000 { + compatible = "allwinner,sun8i-hwspinlock"; + reg = <0x01c18000 0x1000>; + clocks = <&ccu CLK_BUS_SPINLOCK>; + clock-names = "ahb"; + resets = <&ccu RST_BUS_SPINLOCK>; + reset-names = "ahb"; + }; + + /* H6 based OrangePi 3 */ + hwspinlock: hwspinlock@3004000 { + compatible = "allwinner,sun8i-hwspinlock"; + reg = <0x03004000 0x1000>; + clocks = <&ccu CLK_BUS_SPINLOCK>; + clock-names = "ahb"; + resets = <&ccu RST_BUS_SPINLOCK>; + reset-names = "ahb"; + }; -- 2.29.2
