On Wed, Dec 9, 2020 at 9:21 AM Oleksij Rempel <o.rem...@pengutronix.de> wrote:
>
> Remove board specific PHY fixup introduced by commit:
>
> | 709bc0657fe6f9f5 ("ARM: imx6ul: add fec MAC refrence clock and phy fixup
> init")
>
> This fixup addresses boards with a specific configuration: a KSZ8081RNA
> PHY with attached clock source to XI (Pin 8) of the PHY equal to 50MHz.
>
> For the KSZ8081RND PHY, the meaning of the reg 0x1F bit 7 is different
> (compared to the KSZ8081RNA). A set bit means:
>
> - KSZ8081RNA: clock input to XI (Pin 8) is 50MHz for RMII
> - KSZ8081RND: clock input to XI (Pin 8) is 25MHz for RMII
>
> In other configurations, for example a KSZ8081RND PHY or a KSZ8081RNA
> with 25Mhz clock source, the PHY will glitch and stay in not recoverable
> state.
>
> It is not possible to detect the clock source frequency of the PHY. And
> it is not possible to automatically detect KSZ8081 PHY variant - both
> have same PHY ID. It is not possible to overwrite the fixup
> configuration by providing proper device tree description. The only way
> is to remove this fixup.
>
> If this patch breaks network functionality on your board, fix it by
> adding PHY node with following properties:
>
> ethernet-phy@x {
> ...
> micrel,led-mode = <1>;
> clocks = <&clks IMX6UL_CLK_ENET_REF>;
> clock-names = "rmii-ref";
> ...
> };
>
> The board which was referred in the initial patch is already fixed.
> See: arch/arm/boot/dts/imx6ul-14x14-evk.dtsi
>
> Signed-off-by: Oleksij Rempel <o.rem...@pengutronix.de>
Reviewed-by: Fabio Estevam <feste...@gmail.com>
