On Thu, 03 Dec 2020 11:00:00 -0800, Sowjanya Komatineni wrote: > Tegra VI/CSI hardware don't have native 8 lane CSI RX port. > > But x8 capture can be supported by using consecutive x4 ports > simultaneously with HDMI-to-CSI bridges where source image is split > on to two x4 ports. > > This patch updates dt-bindings for csi endpoint data-lane property > with maximum of 8 lanes. > > Signed-off-by: Sowjanya Komatineni <skomatin...@nvidia.com> > --- > .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 4 > ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) >
Acked-by: Rob Herring <r...@kernel.org>
