Adds documentation on how to use the sun8i_hwspinlock driver for sun8i compatible SoCs.
Signed-off-by: Wilken Gottwalt <wilken.gottw...@posteo.net> --- Changes in v4: - changed binding to sun8i-a33-hwpinlock - added changes suggested by Maxime Ripard Changes in v3: - changed symbols from sunxi to sun8i Changes in v2: - fixed memory ranges --- .../bindings/hwlock/sun8i-hwspinlock.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml diff --git a/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml new file mode 100644 index 000000000000..76963d8abd5f --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/sun8i-hwspinlock.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/sun8i-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SUN8I hardware spinlock driver for Allwinner sun8i compatible SoCs + +maintainers: + - Wilken Gottwalt <wilken.gottw...@posteo.net> + +description: + The hardware unit provides sempahores between the ARM cores and the embedded + OpenRisc core on the SoC. + +properties: + compatible: + const: allwinner,sun8i-a33-hwspinlock + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ahb + + resets: + maxItems: 1 + + reset-names: + items: + - const: ahb + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + hwspinlock@1c18000 { + compatible = "allwinner,sun8i-a33-hwspinlock"; + reg = <0x01c18000 0x1000>; + clocks = <&ccu CLK_BUS_SPINLOCK>; + clock-names = "ahb"; + resets = <&ccu RST_BUS_SPINLOCK>; + reset-names = "ahb"; + }; -- 2.29.2
