Sorry response late. Hi Shameer & Ard, Could you let me know which firmware you are using? If the difference is Madt table vGIC your pointed , they are the same. We changed the vGIC memory base address at very early design stage.
Thanks！ -----邮件原件----- 发件人: Shameerali Kolothum Thodi 发送时间: 2020年12月2日 16:23 收件人: Ard Biesheuvel <a...@kernel.org> 抄送: Marc Zyngier <m...@kernel.org>; eric.au...@redhat.com; linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; Linuxarm <linux...@huawei.com>; wanghuiqiang <wanghuiqi...@huawei.com>; xuwei (O) <xuw...@huawei.com> 主题: RE: [PATCH] irqchip/gic-v3: Check SRE bit for GICv2 legacy support [+] > -----Original Message----- > From: Ard Biesheuvel [mailto:a...@kernel.org] > Sent: 30 November 2020 18:32 > To: Shameerali Kolothum Thodi <shameerali.kolothum.th...@huawei.com> > Cc: Marc Zyngier <m...@kernel.org>; eric.au...@redhat.com; > linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; > Linuxarm <linux...@huawei.com> > Subject: Re: [PATCH] irqchip/gic-v3: Check SRE bit for GICv2 legacy > support > ... > > Any clue why production D06 firmware deviates from the D06 port that > exists in Tianocore's edk2-platforms repository? Because that version > does not have this bug, and I wonder why that code was upstreamed at > all if a substantially different version gets shipped with production > hardware. Ok. Thanks for pointing this out. I have informed our UEFI team about this. They will check Internally and clarify. Regards, Shameer
