Hi! On Wed, Dec 16, 2020 at 4:30 PM <tudor.amba...@microchip.com> wrote: > > On 12/15/20 11:46 PM, Bert Vermeulen wrote: > > This driver supports the spiflash core in all RTL838x/RTL839x SoCs, > > and likely some older models as well (RTL8196C). > > > Can we use SPIMEM and move this under drivers/spi/ instead? > > Cheers, > ta
Just took a brief look at the code, and here's my current understanding of this controller: 1. CS is controlled separately with SFCSR_CSB* bits 2. To write 1-4 bytes, set SFCSR_LEN* and write to SFDR 2. To read 1-4 bytes, set SFCSR_LEN* and read SFDR If that's true, this is a generic half-duplex spi controller, and the driver should register a spi_controller with set_cs and transfer_one implemented. -- Regards, Chuanhong Guo
