Quoting Douglas Anderson (2020-12-16 14:41:51) > If we get a timeout sending then this happens: > * spi_transfer_wait() will get a timeout. > * We'll set the chip select > * We'll call handle_err() => handle_fifo_timeout(). > > Unfortunately that won't work so well on geni. If we got a timeout > transferring then it's likely that our interrupt handler is blocked, > but we need that same interrupt handler to adjust the chip select. > Trying to set the chip select doesn't crash us but ends up confusing > our state machine and leads to messages like: > Premature done. rx_rem = 32 bpw8 > > Let's just drop the chip select request in this case. Sure, we might > leave the chip select in the wrong state but it's likely it was going > to fail anyway and this avoids getting the driver even more confused > about what it's doing. > > The SPI core in general assumes that setting chip select is a simple > operation that doesn't fail. Yet another reason to just reconfigure > the chip select line as GPIOs.
BTW, we could peek at the irq bit for the CS change and ignore the irq handler entirely. That would be one way to make sure the cs change went through, and would avoid an irq delay/scheduling problem for this simple operation. Maybe using the irq path is worse in general here?
