On Tue, Dec 22, 2020, Paolo Bonzini wrote:
> Since we know that e >= s, we can reassociate the left shift,
> changing the shifted number from 1 to 2 in exchange for
> decreasing the right hand side by 1.
I assume the edge case is that this ends up as `(1ULL << 64) - 1` and overflows
SHL's max shift count of 63 when s=0 and e=63? If so, that should be called
out. If it's something else entirely, then an explanation is definitely in
order.
> Reported-by: syzbot+e87846c48bf72bc85...@syzkaller.appspotmail.com
> Signed-off-by: Paolo Bonzini <pbonz...@redhat.com>
> ---
> arch/x86/kvm/mmu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
> index 9c4a9c8e43d9..581925e476d6 100644
> --- a/arch/x86/kvm/mmu.h
> +++ b/arch/x86/kvm/mmu.h
> @@ -49,7 +49,7 @@ static inline u64 rsvd_bits(int s, int e)
> if (e < s)
> return 0;
Maybe add a commment? Again assuming my guess about the edge case is on point.
/*
* Use 2ULL to incorporate the necessary +1 in the shift; adding +1 in
* the shift count will overflow SHL's max shift of 63 if s=0 and e=63.
*/
> - return ((1ULL << (e - s + 1)) - 1) << s;
> + return ((2ULL << (e - s)) - 1) << s;
> }
>
> void kvm_mmu_set_mmio_spte_mask(u64 mmio_value, u64 access_mask);
> --
> 2.26.2
>
