From: Yangtao Li <fr...@allwinnertech.com>

commit a1158e36f876f6269978a4176e3a1d48d27fe7a1 upstream.

It is found on many allwinner soc that there is a low probability that
the interrupt status cannot be read in sunxi_pinctrl_irq_handler. This
will cause the interrupt status of a gpio bank to always be active on
gic, preventing gic from responding to other spi interrupts correctly.

So we should call the chained_irq_* each time enter sunxi_pinctrl_irq_handler().

Signed-off-by: Yangtao Li <fr...@allwinnertech.com>
Cc: sta...@vger.kernel.org
Link: 
https://lore.kernel.org/r/85263ce8b058e80cea25c6ad6383eb256ce96cc8.1604988979.git.fr...@allwinnertech.com
Signed-off-by: Linus Walleij <linus.wall...@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gre...@linuxfoundation.org>

---
 drivers/pinctrl/sunxi/pinctrl-sunxi.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1001,20 +1001,22 @@ static void sunxi_pinctrl_irq_handler(st
        if (bank == pctl->desc->irq_banks)
                return;
 
+       chained_irq_enter(chip, desc);
+
        reg = sunxi_irq_status_reg_from_bank(pctl->desc, bank);
        val = readl(pctl->membase + reg);
 
        if (val) {
                int irqoffset;
 
-               chained_irq_enter(chip, desc);
                for_each_set_bit(irqoffset, &val, IRQ_PER_BANK) {
                        int pin_irq = irq_find_mapping(pctl->domain,
                                                       bank * IRQ_PER_BANK + 
irqoffset);
                        generic_handle_irq(pin_irq);
                }
-               chained_irq_exit(chip, desc);
        }
+
+       chained_irq_exit(chip, desc);
 }
 
 static int sunxi_pinctrl_add_function(struct sunxi_pinctrl *pctl,


Reply via email to