From: Stefan Agner <ste...@agner.ch>
[ Upstream commit 656ab1bdcd2b755dc161a9774201100d5bf74b8d ]
According to the datasheet (Rev. 1.9) the RTL8211F requires at least
72ms "for internal circuits settling time" before accessing the PHY
registers. On similar boards with the same PHY this fixes an issue where
Ethernet link would not come up when using ip link set down/up.
Fixes: a2c6e82e5341 ("ARM: dts: meson: switch to the generic Ethernet PHY reset
bindings")
Reviewed-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
Tested-by: Martin Blumenstingl <martin.blumensti...@googlemail.com> # on
Odroid-C1+
Signed-off-by: Stefan Agner <ste...@agner.ch>
Signed-off-by: Kevin Hilman <khil...@baylibre.com>
Link:
https://lore.kernel.org/r/ff78772b306411e145769c46d4090554344db41e.1607363522.git.ste...@agner.ch
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
arch/arm/boot/dts/meson8b-odroidc1.dts | 2 +-
arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/meson8b-odroidc1.dts
b/arch/arm/boot/dts/meson8b-odroidc1.dts
index 0c26467de4d03..5963566dbcc9d 100644
--- a/arch/arm/boot/dts/meson8b-odroidc1.dts
+++ b/arch/arm/boot/dts/meson8b-odroidc1.dts
@@ -224,7 +224,7 @@
reg = <0>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
diff --git a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
index cc498191ddd1d..8f4eb1ed45816 100644
--- a/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
+++ b/arch/arm/boot/dts/meson8m2-mxiii-plus.dts
@@ -81,7 +81,7 @@
reg = <0>;
reset-assert-us = <10000>;
- reset-deassert-us = <30000>;
+ reset-deassert-us = <80000>;
reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>;
};
};
--
2.27.0
