Add support for ZRX-DC compliant PHYs. If PHY is not compliant to ZRX-DC specification, then after every 100ms link should transition to recovery state during the low power states which increases power consumption.
Platforms with ZRX-DC compliant PHY can use "phy-zrxdc-compliant" property in PCIe PHY DT node. Signed-off-by: Anvesh Salveru <anvesh.salv...@gmail.com> Signed-off-by: Pankaj Dubey <pankaj.du...@samsung.com> Signed-off-by: Shradha Todi <shradh...@samsung.com> Cc: Rob Herring <robh...@kernel.org> Cc: Kishon Vijay Abraham I <kis...@ti.com> Cc: Vidya Sagar <vid...@nvidia.com> --- Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt index d23ff90..73f2fa0 100644 --- a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt +++ b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt @@ -15,6 +15,10 @@ Required properties: Required properties for PHY port node: - #phy-cells: Defined by generic PHY bindings. Must be 0. +Optional properties for other PHY features: +- phy-zrxdc-compliant: This property is needed if phy complies with the + ZRX-DC specification. + Refer to phy/phy-bindings.txt for the generic PHY binding properties. Example: -- 2.7.4
