On 21/12/2020 19:13, Martin Blumenstingl wrote: > The vendor kernel uses the following thermal-zone settings: > <= 70°C: > - CPU frequency limited to 1.608GHz > - GPU limited to 511MHz and 5 cores (pixel processors) > > <= 80°C: > - CPU frequency limited to 1.2GHz > - GPU limited to 435MHz and 4 cores (pixel processors) > > <= 90°C: > - CPU frequency limited to 0.804GHz > - GPU limited to 328MHz and 3 cores (pixel processors) > > Add simplified thermal configuration which is taken from the > GXBB/GXL/GXM SoC family (which uses the same manufacturing process and > has the same maximum junction temperature of 125°C). With this the > thermal framework will try to keep the SoC temperature at or below 80°C > which is identical to the vendor kernel (with the exception of one GPU > pixel processor). > > The number of GPU cores are not taken into account as this is not > supported. > > Signed-off-by: Martin Blumenstingl <[email protected]> > --- > arch/arm/boot/dts/meson8.dtsi | 54 +++++++++++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > > diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi > index 04688e8abce2..420324ea2ad7 100644 > --- a/arch/arm/boot/dts/meson8.dtsi > +++ b/arch/arm/boot/dts/meson8.dtsi > @@ -9,6 +9,7 @@ > #include <dt-bindings/power/meson8-power.h> > #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> > #include <dt-bindings/reset/amlogic,meson8b-reset.h> > +#include <dt-bindings/thermal/thermal.h> > #include "meson.dtsi" > > / { > @@ -28,6 +29,7 @@ cpu0: cpu@200 { > resets = <&clkc CLKC_RESET_CPU0_SOFT_RESET>; > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPUCLK>; > + #cooling-cells = <2>; /* min followed by max */ > }; > > cpu1: cpu@201 { > @@ -39,6 +41,7 @@ cpu1: cpu@201 { > resets = <&clkc CLKC_RESET_CPU1_SOFT_RESET>; > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPUCLK>; > + #cooling-cells = <2>; /* min followed by max */ > }; > > cpu2: cpu@202 { > @@ -50,6 +53,7 @@ cpu2: cpu@202 { > resets = <&clkc CLKC_RESET_CPU2_SOFT_RESET>; > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPUCLK>; > + #cooling-cells = <2>; /* min followed by max */ > }; > > cpu3: cpu@203 { > @@ -61,6 +65,7 @@ cpu3: cpu@203 { > resets = <&clkc CLKC_RESET_CPU3_SOFT_RESET>; > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPUCLK>; > + #cooling-cells = <2>; /* min followed by max */ > }; > }; > > @@ -190,6 +195,54 @@ power-firmware@4f00000 { > }; > }; > > + thermal-zones { > + soc { > + polling-delay-passive = <250>; /* milliseconds */ > + polling-delay = <1000>; /* milliseconds */ > + thermal-sensors = <&thermal_sensor>; > + > + cooling-maps { > + map0 { > + trip = <&soc_passive>; > + cooling-device = <&cpu0 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu1 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu2 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu3 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&mali > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + > + map1 { > + trip = <&soc_hot>; > + cooling-device = <&cpu0 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu1 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu2 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu3 > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&mali > THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + > + trips { > + soc_passive: soc-passive { > + temperature = <80000>; /* millicelsius > */ > + hysteresis = <2000>; /* millicelsius */ > + type = "passive"; > + }; > + > + soc_hot: soc-hot { > + temperature = <90000>; /* millicelsius > */ > + hysteresis = <2000>; /* millicelsius */ > + type = "hot"; > + }; > + > + soc_critical: soc-critical { > + temperature = <110000>; /* millicelsius > */ > + hysteresis = <2000>; /* millicelsius */ > + type = "critical"; > + }; > + }; > + }; > + }; > + > mmcbus: bus@c8000000 { > compatible = "simple-bus"; > reg = <0xc8000000 0x8000>; > @@ -254,6 +307,7 @@ mali: gpu@c0000 { > clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; > clock-names = "bus", "core"; > operating-points-v2 = <&gpu_opp_table>; > + #cooling-cells = <2>; /* min followed by max */ > }; > }; > }; /* end of / */ >
Reviewed-by: Neil Armstrong <[email protected]>
