Gentle Ping. Thanks. > -----Original Message----- > From: Shradha Todi <shradh...@samsung.com> > Subject: [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU > > Since outbound iATU permits size to be greater than 4GB for which the > support is also available, allow EP function to send u64 size instead of > truncating to u32. > > Signed-off-by: Shradha Todi <shradh...@samsung.com> > --- > v1: https://lkml.org/lkml/2020/12/18/690 > v2: > Addressed Bjorn's review on to keep commit message length limit to 75 > > drivers/pci/controller/dwc/pcie-designware.c | 2 +- > drivers/pci/controller/dwc/pcie-designware.h | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware.c > b/drivers/pci/controller/dwc/pcie-designware.c > index 1d62ca9..db407ed 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.c > +++ b/drivers/pci/controller/dwc/pcie-designware.c > @@ -326,7 +326,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > int index, int type, > > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size) > + u64 size) > { > __dw_pcie_prog_outbound_atu(pci, func_no, index, type, > cpu_addr, pci_addr, size); > diff --git a/drivers/pci/controller/dwc/pcie-designware.h > b/drivers/pci/controller/dwc/pcie-designware.h > index 7da79eb..359151f 100644 > --- a/drivers/pci/controller/dwc/pcie-designware.h > +++ b/drivers/pci/controller/dwc/pcie-designware.h > @@ -302,7 +302,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, > int index, > u64 size); > void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int > index, > int type, u64 cpu_addr, u64 pci_addr, > - u32 size); > + u64 size); > int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index, > int bar, u64 cpu_addr, > enum dw_pcie_as_type as_type); > -- > 2.7.4
