On 1/19/21 6:34 PM, Xu Yilun wrote:
> From: Matthew Gerlach <matthew.gerl...@linux.intel.com>
>
> This patch adds access tables to the MAX 10 BMC regmap. This prevents
> the host from accessing the unwanted I/O space. It also filters out the
> invalid outputs when reading the regmap debugfs interface.
>
> Signed-off-by: Matthew Gerlach <matthew.gerl...@linux.intel.com>
> Signed-off-by: Xu Yilun <yilun...@intel.com>
> ---
> drivers/mfd/intel-m10-bmc.c | 14 ++++++++++++++
> include/linux/mfd/intel-m10-bmc.h | 5 ++++-
> 2 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
> index b84579b..0ae3053 100644
> --- a/drivers/mfd/intel-m10-bmc.c
> +++ b/drivers/mfd/intel-m10-bmc.c
> @@ -23,10 +23,24 @@ static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
> { .name = "n3000bmc-secure" },
> };
>
> +static const struct regmap_range m10bmc_regmap_range[] = {
> + regmap_reg_range(M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER,
> + M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER),
If this is the only value in the legacy map to be accessed, could it have its
own #define ?
Something like
#define M10BMC_LEGACY_BUILD_VER ?
> + regmap_reg_range(M10BMC_SYS_BASE, M10BMC_SYS_END),
> + regmap_reg_range(M10BMC_FLASH_BASE, M10BMC_FLASH_END),
> +};
> +
> +static const struct regmap_access_table m10bmc_access_table = {
> + .yes_ranges = m10bmc_regmap_range,
> + .n_yes_ranges = ARRAY_SIZE(m10bmc_regmap_range),
> +};
> +
> static struct regmap_config intel_m10bmc_regmap_config = {
> .reg_bits = 32,
> .val_bits = 32,
> .reg_stride = 4,
> + .wr_table = &m10bmc_access_table,
> + .rd_table = &m10bmc_access_table,
The legacy build ver should only be read, so shouldn't these tables be
different ?
Tom
> .max_register = M10BMC_MEM_END,
> };
>
> diff --git a/include/linux/mfd/intel-m10-bmc.h
> b/include/linux/mfd/intel-m10-bmc.h
> index 06da62c..4ba88ed 100644
> --- a/include/linux/mfd/intel-m10-bmc.h
> +++ b/include/linux/mfd/intel-m10-bmc.h
> @@ -11,7 +11,10 @@
>
> #define M10BMC_LEGACY_SYS_BASE 0x300400
> #define M10BMC_SYS_BASE 0x300800
> -#define M10BMC_MEM_END 0x1fffffff
> +#define M10BMC_SYS_END 0x300fff
> +#define M10BMC_FLASH_BASE 0x10000000
> +#define M10BMC_FLASH_END 0x1fffffff
> +#define M10BMC_MEM_END M10BMC_FLASH_END
>
> /* Register offset of system registers */
> #define NIOS2_FW_VERSION 0x0
