On Thu 21 Jan 07:20 CST 2021, Linus Walleij wrote: > On Wed, Jan 20, 2021 at 11:21 PM Bjorn Andersson > <bjorn.anders...@linaro.org> wrote: > > > Several properties are shared between all TLMM bindings. By providing a > > common binding to define these properties each platform's binding can be > > reduced to just listing which of these properties should be checked for > > - or further specified. > > > > Signed-off-by: Bjorn Andersson <bjorn.anders...@linaro.org> > > Overall it looks good, just cutting some slack for reviewers (especially > DT people) before applying. > > > +description: > > + This defines the common properties used to describe all Qualcomm TLMM > > + bindings and pinconf/pinmux states for these. > > I vaguely recall asking you in the past what the acronym TLMM actually > means. This would be a good place to expand the acronym so people > know what these four letters actually represent. >
As Vinod said, it's used in a few places and I agree that we should spell it out here. In particular I had to include "phandle" in the list of valid properties for for the dtbs_check to pass when there are references to state nodes, so I would like to hear from Rob about that. Will respin this after getting his input - hopefully with his Ack ;) > (There, I finally gave you an official reason to go and poke Qualcomm > hardware engineers about this. ;) > :) Regards, Bjorn