[PATCH v6 net-next 02/18] dts: marvell: add CM3 SRAM memory to cp115 ethernet device tree

[stefanc]

From: Konstantin Porotchkin <kos...@marvell.com>

CM3 SRAM address space would be used for Flow Control configuration.

Signed-off-by: Stefan Chulski <stef...@marvell.com>
Signed-off-by: Konstantin Porotchkin <kos...@marvell.com>
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi 
b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16b..359cf42 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -69,6 +69,8 @@
                        status = "disabled";
                        dma-coherent;
 
+                       cm3-mem = <&CP11X_LABEL(cm3_sram)>;
+
                        CP11X_LABEL(eth0): eth0 {
                                interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
                                        <43 IRQ_TYPE_LEVEL_HIGH>,
@@ -211,6 +213,14 @@
                        };
                };
 
+               CP11X_LABEL(cm3_sram): cm3@220000 {
+                       compatible = "mmio-sram";
+                       reg = <0x220000 0x800>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0 0x220000 0x800>;
+               };
+
                CP11X_LABEL(rtc): rtc@284000 {
                        compatible = "marvell,armada-8k-rtc";
                        reg = <0x284000 0x20>, <0x284080 0x24>;
-- 
1.9.1