[PATCH 6/6] arm64: dts: rockchip: add isp1 node on rk3399

[Heiko Stuebner]

From: Heiko Stuebner <heiko.stueb...@theobroma-systems.com>

ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.

Signed-off-by: Heiko Stuebner <heiko.stueb...@theobroma-systems.com>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 26 ++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 7c661d84df25..98cec9387300 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1756,6 +1756,32 @@ isp0_mmu: iommu@ff914000 {
                rockchip,disable-mmu-reset;
        };
 
+       isp1: isp1@ff920000 {
+               compatible = "rockchip,rk3399-cif-isp";
+               reg = <0x0 0xff920000 0x0 0x4000>;
+               interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
+               clocks = <&cru SCLK_ISP1>,
+                        <&cru ACLK_ISP1_WRAPPER>,
+                        <&cru HCLK_ISP1_WRAPPER>;
+               clock-names = "isp", "aclk", "hclk";
+               iommus = <&isp1_mmu>;
+               phys = <&mipi_dsi1>;
+               phy-names = "dphy";
+               power-domains = <&power RK3399_PD_ISP1>;
+               status = "disabled";
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                       };
+               };
+       };
+
        isp1_mmu: iommu@ff924000 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
-- 
2.29.2