Layerscape SoCs doesn't use ipg as clock name.  Remove the clock name
requirement in the schema.  Also the original binding doesn't enforce
the order of "tx" and "rx" in dma-names.  Both orders are used
extensively in existing dtses, update the schema to allow both.

Signed-off-by: Li Yang <leoyang...@nxp.com>
---
 Documentation/devicetree/bindings/i2c/i2c-imx.yaml | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml 
b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
index f23966b0d6c6..57237b0b7d89 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml
@@ -54,20 +54,19 @@ properties:
     maxItems: 1
 
   clock-names:
-    const: ipg
+    maxItems: 1
 
   clock-frequency:
     enum: [ 100000, 400000 ]
 
   dmas:
-    items:
-      - description: DMA controller phandle and request line for RX
-      - description: DMA controller phandle and request line for TX
+    minItems: 2
+    maxItems: 2
 
   dma-names:
     items:
-      - const: rx
-      - const: tx
+      - enum: [ "rx", "tx" ]
+      - enum: [ "tx", "rx" ]
 
   sda-gpios:
     maxItems: 1
-- 
2.17.1

Reply via email to