On Fri, Feb 05, 2021 at 03:42:01PM -0800, Andy Lutomirski wrote:
> On Fri, Feb 5, 2021 at 3:39 PM Kuppuswamy Sathyanarayanan
> <sathyanarayanan.kuppusw...@linux.intel.com> wrote:
> >
> > From: "Kirill A. Shutemov" <kirill.shute...@linux.intel.com>
> >
> > TDX has three classes of CPUID leaves: some CPUID leaves
> > are always handled by the CPU, others are handled by the TDX module,
> > and some others are handled by the VMM. Since the VMM cannot directly
> > intercept the instruction these are reflected with a #VE exception
> > to the guest, which then converts it into a TDCALL to the VMM,
> > or handled directly.
> >
> > The TDX module EAS has a full list of CPUID leaves which are handled
> > natively or by the TDX module in 16.2. Only unknown CPUIDs are handled by
> > the #VE method. In practice this typically only applies to the
> > hypervisor specific CPUIDs unknown to the native CPU.
> >
> > Therefore there is no risk of causing this in early CPUID code which
> > runs before the #VE handler is set up because it will never access
> > those exotic CPUID leaves.
> >
> > Signed-off-by: Kirill A. Shutemov <kirill.shute...@linux.intel.com>
> > Reviewed-by: Andi Kleen <a...@linux.intel.com>
> > Signed-off-by: Kuppuswamy Sathyanarayanan
> > <sathyanarayanan.kuppusw...@linux.intel.com>
> > ---
> > arch/x86/kernel/tdx.c | 32 ++++++++++++++++++++++++++++++++
> > 1 file changed, 32 insertions(+)
> >
> > diff --git a/arch/x86/kernel/tdx.c b/arch/x86/kernel/tdx.c
> > index 5d961263601e..e98058c048b5 100644
> > --- a/arch/x86/kernel/tdx.c
> > +++ b/arch/x86/kernel/tdx.c
> > @@ -172,6 +172,35 @@ static int tdx_write_msr_safe(unsigned int msr,
> > unsigned int low,
> > return ret || r10 ? -EIO : 0;
> > }
> >
> > +static void tdx_handle_cpuid(struct pt_regs *regs)
> > +{
> > + register long r10 asm("r10") = TDVMCALL_STANDARD;
> > + register long r11 asm("r11") = EXIT_REASON_CPUID;
> > + register long r12 asm("r12") = regs->ax;
> > + register long r13 asm("r13") = regs->cx;
> > + register long r14 asm("r14");
> > + register long r15 asm("r15");
> > + register long rcx asm("rcx");
> > + long ret;
> > +
> > + /* Allow to pass R10, R11, R12, R13, R14 and R15 down to the VMM */
> > + rcx = BIT(10) | BIT(11) | BIT(12) | BIT(13) | BIT(14) | BIT(15);
> > +
> > + asm volatile(TDCALL
> > + : "=a"(ret), "=r"(r10), "=r"(r11), "=r"(r12),
> > "=r"(r13),
> > + "=r"(r14), "=r"(r15)
> > + : "a"(TDVMCALL), "r"(rcx), "r"(r10), "r"(r11),
> > "r"(r12),
> > + "r"(r13)
> > + : );
>
> Some "+" constraints would make this simpler. But I think you should
> factor the TDCALL helper out into its own function.
Factor out TDCALL into a helper is tricky: different TDCALLs have
different list of registers passed to VMM.
--
Kirill A. Shutemov
