On Mon, Feb 08, 2021 at 07:24:59AM -0800, kan.li...@linux.intel.com wrote:
> diff --git a/arch/x86/include/asm/processor.h
> b/arch/x86/include/asm/processor.h
> index c20a52b..1f25ac9 100644
> --- a/arch/x86/include/asm/processor.h
> +++ b/arch/x86/include/asm/processor.h
> @@ -139,6 +139,16 @@ struct cpuinfo_x86 {
> u32 microcode;
> /* Address space bits used by the cache internally */
> u8 x86_cache_bits;
> + /*
> + * In hybrid processors, there is a CPU type and a native model ID. The
> + * CPU type (x86_cpu_type[31:24]) describes the type of micro-
> + * architecture families. The native model ID (x86_cpu_type[23:0])
> + * describes a specific microarchitecture version. Combining both
> + * allows to uniquely identify a CPU.
> + *
> + * Please note that the native model ID is not related to x86_model.
> + */
> + u32 x86_cpu_type;
Why are you adding it here instead of simply using
X86_FEATURE_HYBRID_CPU at the call site?
How many uses in this patchset?
/me searches...
Exactly one.
Just query X86_FEATURE_HYBRID_CPU at the call site and read what you
need from CPUID and use it there - no need for this.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
