tree: https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git testing/staging/rtl8188eu head: 25e1a76c1c41a6d6f103b572f4f50ba30787f9ab commit: 78d593615c6f1cd10232a34899af93d5d2696c30 [1/2] Makefile: Enable -Warray-bounds config: microblaze-randconfig-r005-20210209 (attached as .config) compiler: microblaze-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git/commit/?id=78d593615c6f1cd10232a34899af93d5d2696c30 git remote add gustavoars-linux https://git.kernel.org/pub/scm/linux/kernel/git/gustavoars/linux.git git fetch --no-tags gustavoars-linux testing/staging/rtl8188eu git checkout 78d593615c6f1cd10232a34899af93d5d2696c30 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=microblaze
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <l...@intel.com>
All warnings (new ones prefixed by >>):
drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c: In function
'vega10_get_pp_table_entry_callback_func':
>> drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c:3113:30:
>> warning: array subscript 4 is above array bounds of
>> 'ATOM_Vega10_GFXCLK_Dependency_Record[1]' {aka 'struct
>> _ATOM_Vega10_GFXCLK_Dependency_Record[1]'} [-Warray-bounds]
3113 | gfxclk_dep_table->entries[4].ulClk;
| ~~~~~~~~~~~~~~~~~~~~~~~~~^~~
vim +3113 drivers/gpu/drm/amd/amdgpu/../pm/powerplay/hwmgr/vega10_hwmgr.c
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3023
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3024 static int vega10_get_pp_table_entry_callback_func(struct
pp_hwmgr *hwmgr,
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3025 void *state, struct pp_power_state
*power_state,
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3026 void *pp_table, uint32_t classification_flag)
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3027 {
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3028 ATOM_Vega10_GFXCLK_Dependency_Record_V2
*patom_record_V2;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3029 struct vega10_power_state *vega10_power_state =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3030
cast_phw_vega10_power_state(&(power_state->hardware));
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3031 struct vega10_performance_level *performance_level;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3032 ATOM_Vega10_State *state_entry = (ATOM_Vega10_State
*)state;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3033 ATOM_Vega10_POWERPLAYTABLE *powerplay_table =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3034 (ATOM_Vega10_POWERPLAYTABLE
*)pp_table;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3035 ATOM_Vega10_SOCCLK_Dependency_Table *socclk_dep_table
=
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3036 (ATOM_Vega10_SOCCLK_Dependency_Table
*)
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3037 (((unsigned long)powerplay_table) +
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3038
le16_to_cpu(powerplay_table->usSocclkDependencyTableOffset));
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3039 ATOM_Vega10_GFXCLK_Dependency_Table *gfxclk_dep_table
=
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3040 (ATOM_Vega10_GFXCLK_Dependency_Table
*)
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3041 (((unsigned long)powerplay_table) +
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3042
le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset));
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3043 ATOM_Vega10_MCLK_Dependency_Table *mclk_dep_table =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3044 (ATOM_Vega10_MCLK_Dependency_Table *)
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3045 (((unsigned long)powerplay_table) +
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3046
le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3047
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3048
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3049 /* The following fields are not initialized here:
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3050 * id orderedList allStatesList
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3051 */
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3052 power_state->classification.ui_label =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3053
(le16_to_cpu(state_entry->usClassification) &
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3054 ATOM_PPLIB_CLASSIFICATION_UI_MASK) >>
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3055 ATOM_PPLIB_CLASSIFICATION_UI_SHIFT;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3056 power_state->classification.flags =
classification_flag;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3057 /* NOTE: There is a classification2 flag in BIOS
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3058 * that is not being used right now
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3059 */
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3060 power_state->classification.temporary_state = false;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3061 power_state->classification.to_be_deleted = false;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3062
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3063 power_state->validation.disallowOnDC =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3064
((le32_to_cpu(state_entry->ulCapsAndSettings) &
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3065
ATOM_Vega10_DISALLOW_ON_DC) != 0);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3066
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3067 power_state->display.disableFrameModulation = false;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3068 power_state->display.limitRefreshrate = false;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3069 power_state->display.enableVariBright =
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3070
((le32_to_cpu(state_entry->ulCapsAndSettings) &
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3071
ATOM_Vega10_ENABLE_VARIBRIGHT) != 0);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3072
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3073 power_state->validation.supportedPowerLevels = 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3074 power_state->uvd_clocks.VCLK = 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3075 power_state->uvd_clocks.DCLK = 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3076 power_state->temperatures.min = 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3077 power_state->temperatures.max = 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3078
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3079 performance_level =
&(vega10_power_state->performance_levels
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3080
[vega10_power_state->performance_level_count++]);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3081
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3082 PP_ASSERT_WITH_CODE(
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3083
(vega10_power_state->performance_level_count <
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3084
NUM_GFXCLK_DPM_LEVELS),
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3085 "Performance levels exceeds SMC
limit!",
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3086 return -1);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3087
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3088 PP_ASSERT_WITH_CODE(
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3089
(vega10_power_state->performance_level_count <=
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3090
hwmgr->platform_descriptor.
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3091
hardwareActivityPerformanceLevels),
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3092 "Performance levels exceeds Driver
limit!",
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3093 return -1);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3094
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3095 /* Performance levels are arranged from low to high.
*/
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3096 performance_level->soc_clock =
socclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3097
[state_entry->ucSocClockIndexLow].ulClk;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3098 performance_level->gfx_clock =
gfxclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3099
[state_entry->ucGfxClockIndexLow].ulClk;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3100 performance_level->mem_clock = mclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3101
[state_entry->ucMemClockIndexLow].ulMemClk;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3102
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3103 performance_level =
&(vega10_power_state->performance_levels
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3104
[vega10_power_state->performance_level_count++]);
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3105 performance_level->soc_clock =
socclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3106
[state_entry->ucSocClockIndexHigh].ulClk;
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3107 if (gfxclk_dep_table->ucRevId == 0) {
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3108 /* under vega10 pp one vf mode, the gfx clk
dpm need be lower
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3109 * to level-4 due to the limited 110w-power
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3110 */
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3111 if (hwmgr->pp_one_vf &&
(state_entry->ucGfxClockIndexHigh > 0))
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3112 performance_level->gfx_clock =
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 @3113
gfxclk_dep_table->entries[4].ulClk;
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3114 else
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3115 performance_level->gfx_clock =
gfxclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3116
[state_entry->ucGfxClockIndexHigh].ulClk;
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3117 } else if (gfxclk_dep_table->ucRevId == 1) {
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3118 patom_record_V2 =
(ATOM_Vega10_GFXCLK_Dependency_Record_V2 *)gfxclk_dep_table->entries;
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3119 if (hwmgr->pp_one_vf &&
(state_entry->ucGfxClockIndexHigh > 0))
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3120 performance_level->gfx_clock =
patom_record_V2[4].ulClk;
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3121 else
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3122 performance_level->gfx_clock =
c9ffa427db34e6 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Yintian Tao
2019-10-30 3123
patom_record_V2[state_entry->ucGfxClockIndexHigh].ulClk;
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3124 }
ebc1c9c1be5b49 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Rex Zhu
2017-06-19 3125
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3126 performance_level->mem_clock = mclk_dep_table->entries
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3127
[state_entry->ucMemClockIndexHigh].ulMemClk;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3128 return 0;
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3129 }
f83a9991648bb4 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c Eric Huang
2017-03-06 3130
:::::: The code at line 3113 was first introduced by commit
:::::: c9ffa427db34e6896523f0ef0c172a0bbb77c9ad drm/amd/powerplay: enable pp
one vf mode for vega10
:::::: TO: Yintian Tao <yt...@amd.com>
:::::: CC: Alex Deucher <alexander.deuc...@amd.com>
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
