These GDSCs do not support HW control, so remove the property.
Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for
SDM660")
Signed-off-by: Konrad Dybcio <[email protected]>
---
drivers/clk/qcom/gcc-sdm660.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index 05664d6b612a..bc8dfcd6d629 100644
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -2362,7 +2362,6 @@ static struct clk_branch hlos2_vote_turing_adsp_smmu_clk
= {
static struct gdsc ufs_gdsc = {
.gdscr = 0x75004,
- .gds_hw_ctrl = 0x0,
.pd = {
.name = "ufs_gdsc",
},
@@ -2372,7 +2371,6 @@ static struct gdsc ufs_gdsc = {
static struct gdsc usb_30_gdsc = {
.gdscr = 0xf004,
- .gds_hw_ctrl = 0x0,
.pd = {
.name = "usb_30_gdsc",
},
@@ -2382,7 +2380,6 @@ static struct gdsc usb_30_gdsc = {
static struct gdsc pcie_0_gdsc = {
.gdscr = 0x6b004,
- .gds_hw_ctrl = 0x0,
.pd = {
.name = "pcie_0_gdsc",
},
--
2.30.1
